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1 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation the SP506 is a monolithic ic that supports eight (8) popular serial interface standards for dte to dce connectivity. the SP506 is pin-to-pin compatible to our sp505 multi-protocol transceiver but with faster throughput. the seven (7) drivers and seven (7) receivers can transmit and receive signals at 20mbps. as with the sp505, the SP506 requires no additional external components for compliant operation for all of the eight (8) modes of operation. all necessary termination is integrated within the SP506 and is switchable when v.35 drivers, v.35 receivers, and v.11 receivers are used. the SP506 can operate as either a dte or dce. additional features with the SP506 include internal loopback that can be initiated in either single- ended or differential modes. while in loopback mode, driver outputs are internally connected to receiver inputs creating an internal signal path convenient for diagnostic testing. this eliminates the need for an external loopback plug. the SP506 also includes a latch enable pin with the driver and receiver address decoder. tri-state ability for the driver and receiver outputs is controlled by supplying a 4-bit word into the address decoder. seven (7) drivers and one (1) receiver in the SP506 include separate enable pins for added convenience. SP506 5v, single chip wan multi-mode serial transceiver description interface modes supported: ? rs-232 (v.28) ? x.21/rs-422 (v.11) ? eia-530 (v.10 & v.11) ? eia-530a (v.10 & v.11) ? rs-449 (v.10 & v.11) ? v.35 (v.35 & v.28) ? v.36 (v.10 & v.11) ? rs-485 (unterminated v.11) software selectable protocol highest differential transmission rates at over 20mbps +5v only operation seven (7) drivers and seven (7) receivers driver and receiver tri-state control internal transceiver termination resistors for v.11 and v.35 protocols loopback self-test mode improved esd tolerance for analog i/os compliant to net1/2 and tbr2 physical layer requirements used in wan serial ports in routers, switches, dsu/csu's and other access devices eia-530 wan v .35
2 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation specifications t a = +25? and v cc = +4.75v to +5.25v unless otherwise noted. min. typ. max. units conditions logic inputs v il 0.8 volts v ih 2.0 volts logic outputs v ol 0.4 volts i out = ?.2ma v oh 2.4 volts i out = 1.0ma v.28 driver dc parameters outputs open circuit voltage ?5 volts per figure 1 loaded voltage ?.0 ?5 volts per figure 2 short-circuit current ?00 ma per figure 4 power-off impedance 300 ? per figure 5 ac parameters v cc = +5v for ac parameters outputs transition time 1.5 s per figure 6; +3v to -3v instantaneous slew rate 30 v/ s per figure 3 propagation delay t phl 0.5 1 5 s t plh 0.5 1 5 s max.transmission rate 120 230 kbps v.28 receiver dc parameters inputs input impedance 3 7 k ? per figure 7 open-circuit bias +2.0 volts per figure 8 high threshold 1.7 3.0 volts low threshold 0.8 1.2 volts ac parameters v cc = +5v for ac parameters propagation delay t phl 50 100 500 ns t plh 50 100 500 ns absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. v cc ............................................................................+7v input voltages: logic...............................-0.3v to (v cc +0.5v) drivers............................-0.3v to (v cc +0.5v) receivers........................................?5.5v output voltages: logic................................-0.3v to (v cc +0.5v) drivers................................................?5v receivers........................-0.3v to (v cc +0.5v) storage temperature..........................-65?c to +150?c power dissipation per package 80-pin qfp (derate 18.3mw/?c above +70 o c)...1500mw storage considerations due to the relatively large package size of the 80-pin quad flat-pack, storage in a low humidity environment is preferred. large high density plastic packages are moisture sensitive and should be stored in dry vapor barrier bags. prior to usage, the parts should remain bagged and stored below 40? and 60%rh. if the parts are removed from the bag, they should be used within 48 hours or stored in an environment at or below 20%rh. if the above conditions cannot be followed, the parts should be baked for four hours at 125? in order remove moisture prior to soldering. sipex ships the 80-pin qfp in dry vapor barrier bags with a humidity indicator card and desiccant pack. the humidity indicator should be below 30%rh.
3 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation specifications t a = +25? and v cc = +4.75v to +5.25v unless otherwise noted. min. typ. max. units conditions v.28 receiver (continued) ac parameters (cont.) max.transmission rate 120 230 kbps v.10 driver dc parameters outputs open circuit voltage ?.0 ?.0 volts per figure 9 test-terminated voltage 0.9v oc volts per figure 10 short-circuit current ?50 ma per figure 11 power-off current ?00 a per figure 12 ac parameters v cc = +5v for ac parameters outputs transition time 200 ns per figure 13; 10% to 90% propagation delay t phl 50 100 500 ns t plh 50 100 500 ns max.transmission rate 120 kbps v.10 receiver dc parameters inputs input current ?.25 +3.25 ma per figures 14 and 15 input impedance 4 k ? sensitivity ?.3 volts ac parameters v cc = +5v for ac parameters propagation delay t phl 50 120 250 ns t plh 50 120 250 ns max.transmission rate 120 kbps v.11 driver dc parameters outputs open circuit voltage ?.0 volts per figure 16 test terminated voltage ?.0 volts per figure 17 0.5v oc 0.67v oc volts balance ?.4 volts per figure 17 offset +3.0 volts per figure 17 short-circuit current ?50 ma per figure 18 power-off current ?00 a per figure 19 ac parameters v cc = +5v for ac parameters outputs transition time 20 ns per figures 21 and 36; 10% to 90% propagation delay t phl 50 65 85 ns per figures 33 and 36, c l = 50pf t plh 50 65 85 ns per figures 33 and 36, c l = 50pf differential skew 10 20 ns per figures 33 and 36, c l = 50pf max.transmission rate 20 mbps per figure 33, c l = 50pf f in = 10mhz v.11 receiver dc parameters inputs common mode range ? +7 volts sensitivity ?.3 volts
4 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation specifications t a = +25? and v cc = +4.75v to +5.25v unless otherwise noted. min. typ. max. units conditions v.11 receiver (continued) dc parameters (cont.) input current ?.25 ?.25 ma per figure 20 and 22 current w/ 100 termination ?0.75 ma per figure 23 and 24 input impedance 4 k ? ac parameters v cc = +5v for ac parameters propagation delay t phl 30 65 85 ns per figures 33 and 38; c l = 50pf t plh 30 65 85 ns per figures 33 and 38; c l = 50pf differential skew 10 ns per figure 33; c l = 50pf max.transmission rate 20 mbps per figure 33; c l = 50pf f in = 10mhz v.35 driver dc parameters outputs open circuit voltage ?.20 volts per figure 16 test terminated voltage ?.44 ?.66 volts per figure 25 offset ?.6 volts per figure 25 source impedance 50 150 ? per figure 27; z s = v 2 /v 1 x 50 ? short-circuit impedance 135 165 ? per figure 28 ac parameters v cc = +5v for ac parameters outputs transition time 30 40 ns per figure 29; 10% to 90% propagation delay t phl 50 70 90 ns per figures 33 and 36; c l = 20pf t plh 50 70 90 ns per figures 33 and 36; c l = 20pf differential skew 7 10 ns per figures 33 and 36; c l = 20pf max.transmission rate 20 mbps per figure 33; c l = 20pf f in = 10mhz v.35 receiver dc parameters inputs sensitivity ?0 mv source impedance 90 110 ? per figure 30; z s = v 2 /v 1 x 50 ? short-circuit impedance 135 165 ? per figure 31 ac parameters v cc = +5v for ac parameters propagation delay t phl 30 75 90 ns per figures 33 and 38; c l = 20pf t plh 30 75 90 ns per figures 33 and 38; c l = 20pf differential skew 10 ns per figure 33; c l = 20pf max.transmission rate 20 mbps per figure 33; c l = 20pf f in = 10mhz transceiver leakage currents driver output 3-state current 500 a per figure 32; drivers disabled rcvr output 3-state current 1 10 a dec x = 0000, 0.4v v o 2.4v
5 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation other ac characteristics t a = +25? and v cc = +5.0v unless otherwise noted. parameter min. typ. max. units conditions driver delay time between active mode and tri-state mode rs-232/v.28 t pzl ; tri-state to output low 0.70 5.0 sc l = 100pf, fig. 34 & 40; s 1 closed t pzh ; tri-state to output high 0.40 2.0 sc l = 100pf, fig. 34 & 40; s 2 closed t plz ; output low to tri-state 0.20 2.0 sc l = 100pf, fig. 34 & 40; s 1 closed t phz ; output high to tri-state 0.40 2.0 sc l = 100pf, fig. 34 & 40; s 2 closed rs-423/v.10 t pzl ; tri-state to output low 0.15 2.0 sc l = 100pf, fig. 34 & 40; s 1 closed t pzh ; tri-state to output high 0.20 2.0 sc l = 100pf, fig. 34 & 40; s 2 closed t plz ; output low to tri-state 0.20 2.0 sc l = 100pf, fig. 34 & 40; s 1 closed t phz ; output high to tri-state 0.15 2.0 sc l = 100pf, fig. 34 & 40; s 2 closed rs-422/v.11 t pzl ; tri-state to output low 2.80 10.0 sc l = 100pf, fig. 34 & 37; s 1 closed t pzh ; tri-state to output high 0.10 2.0 sc l = 100pf, fig. 34 & 37; s 2 closed t plz ; output low to tri-state 0.10 2.0 sc l = 15pf, fig. 34 & 37; s 1 closed t phz ; output high to tri-state 0.10 2.0 sc l = 15pf, fig. 34 & 37; s 2 closed v.35 t pzl ; tri-state to output low 2.60 10.0 sc l = 100pf, fig. 34 & 37; s 1 closed t pzh ; tri-state to output high 0.10 2.0 sc l = 100pf, fig. 34 & 37; s 2 closed t plz ; output low to tri-state 0.10 2.0 sc l = 15pf, fig. 34 & 37; s 1 closed t phz ; output high to tri-state 0.15 2.0 sc l = 15pf, fig. 34 & 37; s 2 closed receiver delay time between active mode and tri-state mode rs-232/v.28 t pzl ; tri-state to output low 0.12 2.0 sc l = 100pf, fig. 35 & 38; s 1 closed t pzh ; tri-state to output high 0.10 2.0 sc l = 100pf, fig. 35 & 38; s 2 closed t plz ; output low to tri-state 0.10 2.0 sc l = 100pf, fig. 35 & 38; s 1 closed t phz ; output high to tri-state 0.10 2.0 sc l = 100pf, fig. 35 & 38; s 2 closed rs-423/v.10 t pzl ; tri-state to output low 0.10 2.0 sc l = 100pf, fig. 35 & 38; s 1 closed t pzh ; tri-state to output high 0.10 2.0 sc l = 100pf, fig. 35 & 38; s 2 closed t plz ; output low to tri-state 0.10 2.0 sc l = 100pf, fig. 35 & 38; s 1 closed t phz ; output high to tri-state 0.10 2.0 sc l = 100pf, fig. 35 & 38; s 2 closed
6 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation other ac characteristics (continued) t a = +25? and v cc = +5.0v unless otherwise noted. parameter min. typ. max. units conditions power requirements parameter min. typ. max. units conditions v cc 4.75 5.00 5.25 volts i cc (no mode selected) 30 ma all i cc values are with v cc = +5v (v.28/rs-232) 65 ma f in = 120kbps; drivers active & loaded. (v.11/x.21) 175 ma f in = 10mbps; drivers active & loaded. (eia-530 & rs-449) 250 ma f in = 10mbps; drivers active & loaded. (v.35) 100 ma v.35 @ f in = 10mbps, v.28 @ 20kbps; drivers active & loaded. rs-422/v.11 t pzl ; tri-state to output low 0.10 2.0 sc l = 100pf, fig. 35 & 39; s 1 closed t pzh ; tri-state to output high 0.10 2.0 sc l = 100pf, fig. 35 & 39; s 2 closed t plz ; output low to tri-state 0.10 2.0 sc l = 15pf, fig. 35 & 39; s 1 closed t phz ; output high to tri-state 0.10 2.0 sc l = 15pf, fig. 35 & 39; s 2 closed v.35 t pzl ; tri-state to output low 0.10 2.0 sc l = 100pf, fig. 35 & 39; s 1 closed t pzh ; tri-state to output high 0.10 2.0 sc l = 100pf, fig. 35 & 39; s 2 closed t plz ; output low to tri-state 0.10 2.0 sc l = 15pf, fig. 35 & 39; s 1 closed t phz ; output high to tri-state 0.10 2.0 sc l = 15pf, fig. 35 & 39; s 2 closed transceiver to transceiver skew (per figures 33, 36, 38) v.28 driver 100 ns [ (t phl ) tx1 ?(t phl ) tx6,7 ] 100 ns [ (t plh ) tx1 ?(t plh ) tx6,7 ] v.28 receiver 20 ns [ (t phl ) rx1 ?(t phl ) rx2,7 ] 20 ns [ (t plh ) rx1 ?(t phl ) rx2,7 ] v.11 driver 2 ns [ (t phl ) tx1 ?(t phl ) tx6,7 ] 2ns[ (t plh ) tx1 ?(t plh ) tx6,7 ] v.11 receiver 3 ns [ (t phl ) rx1 ?(t phl ) rx2,7 ] 3ns[ (t plh ) rx1 ?(t phl ) rx2,7 ] v.10 driver 5 ns [ (t phl ) tx2 ?(t phl ) tx3,4,5 ] 5ns[ (t plh ) tx2 ?(t plh ) tx3,4,5 ] v.10 receiver 5 ns [ (t phl ) rx2 ?(t phl ) rx3,4,5 ] 5ns[ (t plh ) rx2 ?(t phl ) rx3,4,5 ] v.35 driver 4 ns [ (t phl ) tx1 ?(t phl ) tx6,7 ] 4ns[ (t plh ) tx1 ?(t plh ) tx6,7 ] v.35 receiver 6 ns [ (t phl ) rx1 ?(t phl ) rx2,7 ] 6ns[ (t plh ) rx1 ?(t phl ) rx2,7 ]
7 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation a v oc c a v t c 3k ? ? oscilloscope scope used for slew rate measurement. a i sc c a c v cc = 0v 2v i x a c 3k ? 2500pf oscilloscope figure 1. v.28 driver output open circuit voltage figure 2. v.28 driver output loaded voltage figure 3. v.28 driver output slew rate figure 4. v.28 driver output short-circuit current figure 6. v.28 driver output rise/fall times figure 5. v.28 driver output power-off impedance test circuits
8 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation figure 7. v.28 receiver input impedance a c i ia 15v a c v oc figure 8. v.28 receiver input open circuit bias a v oc 3.9k ? c a v t 450 ? c a c 0.25v v cc = 0v i x a i sc c figure 9. v.10 driver output open-circuit voltage figure 10. v.10 driver output test terminated voltage figure 12. v.10 driver output power-off current figure 11. v.10 driver output short-circuit current
9 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation figure 13. v.10 driver output transition time figure 14. v.10 receiver input current a 450 ? c oscilloscope a c i ia 10v +3.25ma ?.25ma +10v +3v ?v ?0v maximum input current v ersus voltage v .10 receiver figure 15. v.10 receiver input iv graph figure 16. v.11 and v.35 driver output open-circuit voltage a b v oc 3.9k ? v oca v ocb c a b v t 50 ? v os c 50 ? a b c i sa i sb figure 17. v.11 driver output test terminated voltage figure 18. v.11 driver output short-circuit current
10 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation a b c i xa 0.25v a b c i xb 0.25v v cc = 0v v cc = 0v a b c i ia 10v c i ib 10v a b +3.25ma ?.25ma +10v +3v ?v ?0v maximum input current v ersus voltage v .11 receiver figure 19. v.11 driver output power-off current figure 20. v.11 receiver input current figure 21. v.11 driver output rise/fall time figure 22. v.11 receiver input iv graph a b 50 ? c 50 ? 50 ? v e oscilloscope
11 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation a b c i ia 6v c i ib 6v a b 100 ? to 150 ? 100 ? to 150 ? v .11 receiver w/ optional cable termination (100 ? to 150 ? ) i [ma] = v [v] / 0.1 i [ma] = (v [v] ?3) / 4.0 i [ma] = (v [v] ?3) / 4.0 figure 23. v.11 receiver input current w/ termination figure 24. v.11 receiver input graph w/ termination figure 25. v.35 driver output test terminated voltage figure 26. v.35 driver output offset voltage figure 27. v.35 driver output source impedance a b 50 ? c 50 ? v t v os a b v 2 50 ? c 24khz, 550mv p-p sine wave v 1 a b 50 ? c 50 ? v t v os
12 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation figure 32. driver output leakage current test figure 33. driver/receiver timing test circuit figure 30. v.35 receiver input source impedance figure 29. v.35 driver output rise/fall time figure 31. v.35 receiver input short-circuit impedance figure 28. v.35 driver output short-circuit impedance a b c i sc 2v a b c 50 ? oscilloscope 50 ? 50 ? a b c i sc 2v c l1 15pf r out a b a b t in c l2 f in (50% duty cycle, 2.5v p-p ) a b v 2 50 ? c 24khz, 550mv p-p sine wave v 1 a b i zsc logic ? 15v 0 00 0 dec 3 dec 2 dec 1 dec 0 v cc = 0v v cc any one of the three conditions for disabling the driver.
13 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation figure 34. driver timing test load circuit figure 35. receiver timing test load circuit 500 ? c l output under t est s 1 s 2 v cc 1k ? 1k ? c rl receiver output s 1 s 2 t est point v cc figure 36. driver propagation delays figure 37. driver enable and disable times figure 38. receiver propagation delays +3v 0v 5v v ol a, b 0v 1.5v 1.5v t zl t zh v oh a, b 2.3v 2.3v t lz t hz 0.5v 0.5v output normally low output normally high decx or tx_enable v oh v ol receiver out (v oh - v ol )/2 (v oh - v ol )/2 t plh f > 10mhz; t r < 10ns; t f < 10ns output v 0d2 + v 0d2 a b 0v 0v t phl input t skew = | t phl - t plh | +3v 0v a b driver output v o + differential output v a ?v b 0v v o 1.5v 1.5v t plh t r t f f > 10mhz; t r < 10ns; t f < 10ns v o 1/2v o 1/2v o t phl t dplh t dphl t skew = | t dplh - t dphl | driver input
14 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation figure 39. receiver enable and disable times figure 40. v.28 (rs-232) and v.10 (rs-423) driver enable and disable times +3v 0v 5v receiver out 0v 1.5v 1.5v t zl t zh receiver out 1.5v 1.5v t lz t hz 0.5v 0.5v output normally low output normally high v il v ih decx or rcvr enable +3v 0v decx or tx_enable 1.5v 1.5v t zl t out t lz output low 0v +3v 0v v oh 1.5v 1.5v t zh t out 0.5v t hz output high 0v decx or tx_enable v ol 0.5v 0.5v 0.5v
15 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation figure 41. typical v.28 driver output waveform figure 42. typical v.10 driver output waveform figure 43. typical v.11 driver output waveforms figure 44. typical v.35 driver output waveforms
16 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation pinout pin assignments clock and data group pin 1 ?rxd ?receive data; ttl output, sourced from rd(a) and rd(b) inputs. pin 14 ?txd ?ttl input ; transmit data source for sd(a) and sd(b) outputs. pin 15 ?txc ?transmit clock; ttl input for tt driver outputs. pin 20 rxc ?receive clock; ttl output sourced from rt(a) and rt(b) inputs. pin 22 ?st ?send timing; ttl input; source for st(a) and st(b) outputs. pin 37 ?rt(a) ?receive timing; analog input, inverted; source for rxc. pin 38 ?rt(b) ?receive timing; analog input, non-inverted; source for rxc. pin 42 ?st(a) ?send timing; analog output, inverted; sourced from st. pin 44 ?st(b) ?send timing; analog output, non-inverted; sourced from st. pin 59 ?sd(b) ?analog out ?send data, non-inverted; sourced from txd. pin 61 ?sd(a) ?analog out ?send data, inverted; sourced from txd. pin 63 tt(a) analog out terminal timing, inverted; sourced from txc pin 65 ?tt(b) analog out terminal timing, non?nverted; sourced from txc. pin 70 ?rd(a) ?receive data, analog input; inverted; source for rxd. pin 71 ?rd(b) ?receive data; analog input; non-inverted; source for rxd. pin 76 ?sct(a) ?serial clock transmit; analog input, inverted; source for sct. pin 77 ?sct(b) ?serial clock transmit: analog input, non?nverted; source for sct pin 79 ?sct ?serial clock transmit; ttl output; sources from sct(a) and sct(b) inputs. control line group pin 13 ?dtr ?data terminal ready; ttl input; source for tr(a) and tr(b) outputs. pin 16 ?rts ?ready to send; ttl input; source for rs(a) and rs(b) outputs. pin 17 ?rl ?remote loopback; ttl input; source for rl(a) and rl(b) outputs. pin 19 ?dcd?data carrier detect; ttl output; sourced from rr(a) and rr(b) inputs. pin 21 ?ri ?ring in; ttl output; sourced from ic(a) and ic(b) inputs. pin 24 ?ll ?local loopback; ttl input; source for ll(a) and ll(b) outputs. pin 35 ?rr(a)?receiver ready; analog input, inverted; source for dcd. pin 36 ?rr(b)?receiver ready; analog input, non-inverted; source for dcd. pin 39 ?ic(a)?incoming call; analog input, inverted; source for ri. pin 40 ?ic(b)?incoming call; analog input,non-inverted; source for ri. rxd 1 sden 2 tren 3 rsen 4 llen 5 tten 6 scten 7 latch 8 dec 3 9 dec 2 10 dec 1 11 dec 0 12 dtr 13 txd 14 txc 15 r ts 16 rl 17 rlen 18 dcd 19 rxc 20 ri 21 st 22 sten 23 ll 24 v cc 25 c 1 + 26 v dd 27 c 2 + 28 gnd 29 c 1 30 c 2 31 v ss 32 v cc 33 gnd 34 rr(a) 35 rr(b) 36 r t(a) 37 r t(b) 38 ic(a) 39 ic(b) 40 60 gnd 59 sd(b) 58 tr(a) 57 gnd 56 tr(b) 55 v cc 54 rs(a) 53 gnd 52 rs(b) 51 ll(a) 50 gnd 49 ll(b) 48 v cc 47 rl(a) 46 gnd 45 rl(b) 44 st(b) 43 gnd 42 st(a) 41 v cc 80 cts 79 sct 78 dsr 77 sct(b) 76 sct(a) 75 gnd 74 v cc 73 v cc 72 gnd 71 rd(b) 70 rd(a) 69 dm(b) 68 dm(a) 67 cs(b) 66 cs(a) 65 tt(b) 64 gnd 63 tt(a) 62 v cc 61 sd(a) SP506
17 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation pin 7 ?scten ?enables sct receiver; active high; ttl input. pin 8 ?latch ?latch control for decoder bits (pins 9-12), active low. logic high input will make decoder transparent. pins 12? ?dec 0 ?dec 3 ?transmitter and receiver decode register; configures transmitter and receiver modes; ttl inputs. pin 18 ?rlen ?enables rl driver; active low; ttl input. pin 23 ?sten ?enables st driver; active low; ttl input. power supplies pins 25, 33, 41, 48, 55, 62, 73, 74 ?v cc ?+5v input. pins 29, 34, 43, 46, 50, 53, 57, 60, 64, 72, 75 gnd ?ground. pin 27 ?v dd +10v charge pump capacitor connects from v dd to v cc . suggested capaci- tor size is 22?, 16v. pin 32 ?v ss ?0v charge pump capacitor connects from ground to v ss . suggested ca- pacitor size is 22?, 16v. pins 26 and 30 ?c 1 + and c 1 ?charge pump capacitor ?connects from c 1 + to c 1 . suggested capacitor size is 22?, 16v. pins 28 and 31 ?c 2 + and c 2 ?charge pump capacitor ?connects from c 2 + to c 2 . suggested capacitor size is 22?, 16v. pin 45 ?rl(b) ?remote loopback; analog output, non-inverted; sourced from rl. pin 47 ?rl(a) ?remote loopback; analog output inverted; sourced from rl. pin 49?ll(b) ?local loopback; analog output, non-inverted; sourced from ll. pin 51 ?ll(a) ?local loopback; analog output, inverted; sourced from ll. pin 52 ?rs(b) ?ready to send; analog output, non-inverted; sourced from rts. pin 54 rs(a) ?ready to send; analog output, inverted; sourced from rts. pin 56 tr(b) ?terminal ready; analog output, non-inverted; sourced from dtr. pin 58 ?tr(a) ?terminal ready; analog output, inverted; sourced from dtr. pin 66 cs(a)? clear to send; analog input, inverted; source for cts. pin 67 ?cs(b)?clear to send; analog input, non-inverted; source for cts. pin 68 dm(a)?data mode; analog input, inverted; source for dsr. pin 69 ?dm(b)?data mode; analog input, non-inverted; source for dsr pin 78 ?dsr?data set ready; ttl output; sourced from dm(a), dm(b) inputs. pin 80 cts?clear to send; ttl output; sourced from cs(a) and cs(b) inputs. control registers pins 2 ?sden ?enables txd driver, active low; ttl input. pins 3 ?tren ?enables dtr driver, active low; ttl input. pins 4 ?rsen ?enables rts driver, active low; ttl input. pins 5 ?llen ?enables ll driver, active low; ttl input. pin 6 ?tten ?enables tt driver, active low; ttl input.
18 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation table 1. SP506 driver decoder table table 2. SP506 receiver decoder table SP506 receiver mode selection SP506 driver mode selection pin label rd(a) rd(b) r t(a) r t(b) cs(a) cs(b) dm(a) dm(b) rr(a) rr(b) ic(a) ic(b) sct(a) sct(b) pin label mode: rs232 v.35 rs422 rs449 eia530 eia-530a v.36 0000 0010 1110 0100 0101 1100 1101 1111 0110 sd(a) tri-state v .28 v .35 v .11 v .11 v .11 sd(b) v .35+ v .11+ v .11+ v .11+ tr(a) tri-state v .28 v .11 v .11 v .11 v .10 tr(b) tri-state tri-state tri-state v .11+ v .11+ v .11+ tri-state rs(a) tri-state v .28 v .11 v .11 v .11 rs(b) tri-state tri-state tri-state v .11+ v .11+ v .11+ rl(a) tri-state v .28 v .11 v .11 v .10 rl(b) tri-state tri-state tri-state v .11+ v .11+ tri-state ll(a) tri-state v .28 v .11 v .11 v .10 ll(b) tri-state tri-state tri-state v .11+ v .11+ tri-state st(a) tri-state v .28 v .35 v .11 v .11 v .11 st(b) v .35+ v .11+ v .11+ v.11+ tt(a) tri-state v .28 v .35 v .11 v .11 v .11 tt(b) v .35+ v .11+ v .11+ v .11+ tri-state tri-state tri-state tri-state tri-state tri-state v .28 v .28 v .28 v .28 v .11 v .11+ v .11 v .11+ v .11 v .11+ tri-state v .11 v .11+ v .11 v .11+ v .10 v .11 v .11+ v .11 v .11+ v .11 v .11+ v .11 v .11+ v .11 v .11+ v .10 tri-state v .10 tri-state v .11 v .11+ v .10 tri-state v .10 tri-state v .10 tri-state v .11 v .11+ v .11 v .11+ mode: rs232 v.35 rs422 w/ term. rs422 rs449 eia530 eia-530a v.36 0000 0010 1110 0100 0101 1100 1101 1111 0110 v .28 v .35 v .11 v .11 v .11 v .35+ v .11+ v .11+ v .11+ v .28 v .11 v .11 v .11 v .11+ v .11+ v .11+ v .28 v .11 v .11 v .11 v .11+ v .11+ v .11+ v .28 v .11 v .11 v .11+ v .11+ v .28 v .11 v .11 v .11+ v .11+ v .28 v .11 v .11 v .11+ v .11+ v .28 v .35 v .11 v .11 v .11 v .35+ v .11+ v .11+ v .11+ v .28 v .28 v .28 v .11 v .11+ v .11 v .11+ v .11 v .11+ v .10 v .10 v .10 >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >12k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd >10k ? to gnd v .11 v .11+ v .11 v .11+ >10k ? to gnd >10k ? to gnd v .10 v .10 >10k ? to gnd v .10 >10k ? to gnd v .10 v .11 v .11+ v .11 v .11+ v .11 v .11+ >10k ? to gnd v .10 v .35 v .35+ v .28 >10k ? to gnd v .11 v .11+ 30 dec ?dec 30 dec ?dec 120 ? 120 ? 120 ? rs422 w/ term. 120 ? 120 ? 120 ? v .11 v .11+ v .11 v .11+ 120 ? 120 ? 120 ? v .11 v .11+ v .11 v .11+ v .11 v .11+ 120 ? 120 ? 120 ? v .11 v .11+ v .11 v .11+ v .11 v .11+ 120 ? 120 ? 120 ?
19 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation figure 45. SP506 typical operating circuit rd(a) 70 rxd 1 rd(b) 71 r t(a) 37 rxc 20 r t(b) 38 cs(a) 66 cts 80 cs(b) 67 dm(a) 68 dsr 78 dm (b) 69 rr(a) 35 dcd 19 rr(b) 36 ic(a) 39 ri 21 ic(b) 40 sct(a) 76 sct 79 scten 7 sct(b) 77 14 txd 61 sd(a) 59 sd(b) 2 sden 22 st 42 st(a) 44 st(b) 23 sten 15 txc 63 tt(a) 65 tt(b) 6 tten 13 dtr 58 tr(a) 56 tr(b) 3 tren 16 rts 54 rs(a) 52 rs(b) 4 rsen 17 rl 47 rl(a) 45 rl(b) 18 rlen 24 ll 51 ll(a) 49 ll(b) 5 llen 22 f 22 f 1n5819 v cc v dd c1- c2- v ss c1+ c2+ 22 f +5v 10 f 27 25 26 31 28 30 22 f 32 9 10 11 12 mode x 1 0 1 0 rs-422 mode input word a b charge pump a ?receiver tri-state circuitry, v .11, & v.35 termination resistor circuitry (rxd, rxc & sct). b ?driver tri-state circuitry & v .35 termination circuitry (txd, txc & st). SP506 (see pinout assignments for ground pins) 8 decoder latch latch (see pinout for v cc pins)
20 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation 80 pin mqfp (ms-022 bc) b e seating plane a1 a a l1 5 -16 0 min. 0 ? 5 -16 l a2 0.30" rad. typ. 0.20" rad. typ. c pin 1 e1 d1 d c l e c l d2 e2 dimensions minimum/maximum (mm) symbol a a1 a2 b d d1 d2 e e1 e2 e n 80?in mqfp jedec ms-22 (bec) variation min nom max 2.45 0.00 0.25 1.80 2.00 2.20 0.22 0.40 17.20 bsc 14.00 bsc 12.35 ref 17.20 bsc 14.00 bsc 12.35 ref 0.65 bsc 80 common dimentions symbl min nom max c 0.11 23.00 l 0.73 0.88 1.03 l1 1.60 basic package: 80 pin mqfp
21 rev: a date: 1/27/04 SP506 multi?ode serial transceiver ?copyright 2004 sipex corporation ordering information model temperature range package types SP506cf ........................................................................... 0? to +70? ...................................................... 80?in jedec (be-2 outline) mqfp sipex corporation reserves the right to make changes to any products described herein. sipex does not assume any liability aris ing out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. please consult the factory for pricing and availability on a tape-on-reel option. date revision description 1/27/04 a implemented tracking revision. revision history

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